Event Sponsors

DVCON Japan is a gathering point for engineers and researchers working on electronic design and system-level verification, bringing together the internationally recognized DVCON and DVCon Japan event family under one Japan-based umbrella. The program is built around technical sessions and tutorials that address modeling, simulation, hardware description languages, and verification methodology, with the emphasis on practical workflows that teams can carry back into their own projects. Attendees typically come from a mixture of academic, industrial, and tool-vendor backgrounds, which makes the exchange of ideas unusually open and concrete rather than purely promotional.

The event takes place in a modern conference setting, and the 2017 edition of DVCON Japan was hosted at the Minato House South Wing of the New Yokohama International Hotel. Holding the meeting in Japan gave domestic participants direct access to the same technical content that is well established in other regions of the DVCON series, while also allowing local presenters to share their own methods and experiences with an international audience. The venue choice reflected the organizers' desire for a comfortable, well-equipped environment that supports both the sessions and the informal conversation between them.

DVCON Japan is organized by Accellera, the United States non-profit body known for creating and promoting standards in system-level design, modeling, and verification. As the organizing body, Accellera also supports a wider group of global sponsors who contribute to the program. These supporting organizations help sustain the event's technical depth, making it possible to offer a broad selection of sessions across multiple tracks covering SystemC, verification, and LPB topics, together with the associated tutorial and workshop formats that attendees have come to expect from the DVCON series.

The sponsorship structure for DVCON Japan 2017 reflects the collaborative nature of the design and verification community. Alongside the Accellera global sponsors, participating organizations from the tool and IP ecosystem lent their support to the inaugural Japan program, and their involvement helps keep the sessions grounded in the tooling that engineers use daily. By acknowledging the organizations that contribute to the program, the event recognizes the wider ecosystem rather than presenting any single viewpoint, and the variety of sponsors gives the agenda breadth across modeling languages, verification environments, and low-power design considerations.

Beyond the technical agenda, DVCON Japan serves as a forum where the design and verification community in Japan can connect with peers from abroad. The event's format encourages questions, discussion, and the sharing of approaches that have been refined in real projects, which is why practitioners and tool providers alike value participation. For newcomers, the program offers an accessible introduction to the DVCON body of work and to the standards ecosystem that Accellera maintains; for veterans, it provides a setting in which to compare notes on methodology, language adoption, and verification challenges that are common across regions.